VLSI-SoC 2024 is the 32th in a series of international conferences sponsored by IFIP WG 10.5, IEEE CEDA, and IEEE CASS, which explore the state-of-the-art in the areas of Very Large Scale Integration (VLSI) and System-on-Chip (SoC) design. The purpose of VLSI-SoC is to provide a forum to exchange ideas and showcase academic as well as industrial research in architectures, circuits, devices, design automation, verification, test, and security, within digital, analog, and mixed-signal systems. VLSI-SoC’24 will take place at hotel Barcelo, Tanger, Morocco, and it is organized by the Delft University of Technology.
VLSI-SoC 2024 will be held under the theme "SoCs for 5G Evolution and 6G"
exploring the design and optimization challenges around 5G+6G communication systems and devices embedded systems, security, low power circuits, powered by CMOS and beyond CMOS-technologies.
Areas of interest include (but not limited):
- Analog, mixed-signal, RF, and sensors
- Digital circuits, low-power design, SoC, NoC, and reconfigurable architectures
- Design for AI acceleration and machine learning for SoC design
- Circuits and systems for signal processing and communications
- Modelling, simulation, verification, and prototyping
- EDA tools and methodologies for IC design
- Design for testability, reliability, and fault tolerance
- Hardware security
- IoT, embedded and cyber-physical systems: Architecture, design, and Software
- Emerging computing paradigms: Quantum computing, cryogenic processors
- 5G / 6G emerging technologies
Eligibility for Ph.D. Forum: The author must have completed at least one year of a Ph.D. program. Past Ph.D. scholars who have defended their thesis in or after June 2023 are also encouraged to submit.
Presentation: Posters will be introduced in the Ph.D. Forum Session (two minute time slot, one slide) and next will be presented in a full one hour Poster Session.
Publication: Accepted posters will be given two pages in the informal proceedings.
Grants for Ph.D. students: VLSI-SoC 2024 will provide a limited number of travel grants through the Technical Committee TC-10 and WG-10.5 of the IFIP. Grants are intended to support students from emerging and underdeveloped countries (by UN classification), who cannot be fully supported by their institutions.
How to Apply: Submit a two-page extended abstract of your research work in PDF format. Send submissions via the Molesystems platform of VLSI-SoC 2024.
Paper Format: Papers should be compliant with the guidelines for regular papers.
Key Dates
Extended Abstract Submission: 10 May 2024
Author Notification: 10 June 2024
Camera Ready: 30 June 2024
PC Members
- Ateet Bhalla, Independent Researcher, India
- Alessio Burrello, Polytechnic of Turin, Italy
- Florenc Demrozi, University of Stavanger, Norway
- Nahla El-Araby, TU Wein, Austria
- Bahar Farahani, Shahid Beheshti University, Iran
- Farshad Firouzi, DUKE University, USA
- Enrico Fraccaroli, UNC Chapel Hill, USA
- Samuele Germiniani, University of Verona, Italy
- Tara Ghasempouri, Tallinn University of Technology, Estonia
- Sahar Hamed, Coventry University, Cairo Branch, Egypt
- Philipp Kindt, TU Chemnitz, Germany
- Christian Krieg, TU Wein, Austria
- Michele Lora, University of Verona, Italy
- Tiziana Margaria, University of Limerick, Ireland
- Pierluigi Nuzzo, University of Southern California, USA
- Emanuel Popovici, University College Cork, Ireland
Contact Information
For more information, please contact the Program Chairs