Tutorial 1 – Artificial intelligence: from fundamentals to Applications

Prof. Kaushik Roy - Purdue University  (US)

Abstract: Artificial Intelligence (AI) is transforming industries and shaping the future of technology. This tutorial provides a comprehensive introduction to the fundamentals of AI, designed for beginners and enthusiasts seeking to understand the core concepts and applications. We will explore the history and evolution of AI, key terminologies, and foundational principles, including machine learning, regression, different flavours of neural networks, robustness and security aspects of AI, AI hardware, etc. Through practical examples and case studies, attendees will gain insights into how AI systems are developed and deployed in various fields. By the end of this tutorial, participants will have a solid grounding in AI concepts and be equipped with the knowledge to delve deeper into specialized AI domains.


  • Introduction
  • Linear Regression, Logistic Regression
  • Regularization
  • Neural Networks
  • Training Neural networks, backpropagation
  • Support vector Machines
  • Convolutional Neural Networks
  • Recurrent neural Networks, LSTMs, Spiking neural networks
  • Robustness and Security
  • AI Hardware
  • AI in real applications

Bio: Kaushik Roy is the Edward G. Tiedemann, Jr., Distinguished Professor of Electrical and Computer Engineering at Purdue University. He received his BTech from Indian Institute of Technology, Kharagpur, PhD from University of Illinois at Urbana-Champaign in 1990 and joined the Semiconductor Process and Design Center of Texas Instruments, Dallas, where he worked for three years on FPGA architecture development and low-power circuit design. His current research focuses on cognitive algorithms, circuits and architecture for energy-efficient neuromorphic computing/ machine learning, and neuro-mimetic devices. Kaushik has supervised more than100 PhD dissertations and his students are well placed in universities and industry. He is the co-author of two books on Low Power CMOS VLSI Design (John Wiley & McGraw Hill). 

Dr. Roy received the National Science Foundation Career Development Award in 1995, IBM faculty partnership award, ATT/Lucent Foundation award, 2005 SRC Technical Excellence Award, SRC Inventors Award, Purdue College of Engineering Research Excellence Award, Outstanding Mentor Award in 2021, Humboldt Research Award in 2010, 2010 IEEE Circuits and Systems Society Technical Achievement Award (Charles Desoer Award), IEEE TCVLSI Distinguished Research Award in 2021,  Distinguished Alumnus Award from Indian Institute of Technology (IIT), Kharagpur, Fulbright-Nehru Distinguished Chair, DoD Vannevar Bush Faculty Fellow (2014-2019), SRC Aristotle Award in 2015, Purdue Arden L. Bement Jr. Award in 2020, SRC Innovation Award in 2022, honorary doctorate from Aarhus University in 2023, and several best paper awards Dr. Roy is a fellow of IEEE.

Tutorial 2 – Computers: from Intel 4004 to Neuro Chips

Henk Corporaal - Technical University of Eindhoven (NL)

Abstract: In 1971 Intel designed the first single chip microprocessor, the 4-bit 4004 processor. Since then, the area of computer architecture has shown an unprecedented growth in performance, from roughly 10 kOps/Sec to more than 100 TOps/Sec, that’s about 100x every decade, and that 5 decades! How was this possible, and will this continue? While performance is still very important, since about two decades energy efficiency took over as main driver of today’s processor design. What caused this change of focus? To increase efficiency architects are often trading flexibility; is this smart? Processors are used almost everywhere, in a wide range of application domains. Therefore, we see many flavors, ranging from generic, general purpose processors, as used in PCs and laptops, to highly dedicated and specialized ones, like used in the signal processing domain. The last decade shows a new application development, the rise of deep learning, impacting all aspects of our life. The networks for deep learning increased by 100,000x in ten years. This is even beyond the imagination of a computer architect. How can we deal with this, what is its impact on computer architecture?


  • Part 1: this part covers the history, and shows the major developments enabling the tremendous growth in performance.
  • Part 2: This part focusses on energy efficiency as main driver since 2005. Where is the energy consumed in a processor and what measures are taken and can we take to improve the efficiency.
  • Part 3: this part discusses the impact of deep learning on computer architecture. How can we deal with the unparalleled growth of deep learning compute requirements; are we still in control?
  • Part 4: At the end we discuss possible future developments hopefully bringing computer architects back in control.

Bio: Henk Corporaal is Professor in Embedded System Architectures at the Eindhoven University of Technology (TU/e) in The Netherlands. He has gained an MSc in Theoretical Physics from the University of Groningen, and a PhD in Electrical Engineering, in the area of Computer Architecture, from Delft University of Technology. His research is on low-power multi-processor, heterogeneous processing architectures, their programmability, and the predictable design of soft- and hard real-time systems. This includes research and design of embedded system architectures, including CGRAs, SIMD, VLIW, and GPUs, on accelerators, the exploitation of all kinds of parallelism, fault-tolerance, approximate computing, architectures for machine and deep learning, optimizations and mapping of deep learning networks, and the (semi-)automated mapping of applications to these architectures. Corporaal has co-authored over 500 journal and conference papers. Furthermore, he invented a new class of VLIW architectures, the Transport Triggered Architectures, which is used in several commercial products, and by many research groups. He initiated and leads the Dutch NWO perspectief program on Efficient Deep Learning (efficientdeeplearning.nl); in this program, many research institutes and over 30 companies participated. He also is the PI of the EU project CONVOLVE (convolve.eu) on seamless design of smart edge processors, with 19 partners. For further details see corporaal.org